Consider the top section of fig.5, which shows a simulation of the subframe signal carrying an audio word value of 255 and filtered using a time constant of…
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We now proceed to model a bandwidth-limited link by filtering the subframe signal with a first-order (RC) low-pass filter, and determine what degree of filtering will result in bit errors. Using the first-order filter model is a gross simplification of the time-domain behavior of a real link—accurate analysis requires the use of transmission-line theory at the high frequencies involved—but it's a good starting point for investigation.
In order to reduce the jitter sampling rate to a useful value, we take advantage of the following argument: In a practical interface receiver circuit the PLL will usually employ a loop filter with a break frequency of <20kHz. If we assume that the audio sampling rate is much greater than the PLL loop frequency, then the zero-crossing time to jitter-mapping operation can be performed by computing a running average of the zero-crossing times across two subframes. Thus, the jitter value associated with a pair of adjacent subframes can be written:
Equation 8:
where M is…
Comparison of Measured Results with Simulations: Using the techniques discussed above, we will now compare the results of simulations with measured results from the experimental interface receiver of fig.4. This circuit allows the instantaneous frequency of the recovered clock to be measured by monitoring the control voltage on the varicap diode. In order to recover the jitter signal on the clock, we must convert the instantaneous frequency signal to a timing error. Consider a frequency deviation Δf in a recovered clock of nominal frequency fo; over a time period dt, the timing error tj can…
Interface Noise: Besides increasing the (low) possibility of amplitude errors, interface noise can also be the cause of timing jitter in a band-limited interface. Consider a link with a time constant of RC, where, at the zero-crossing points, the rate of change of the received interface signal will be equal to Vd/RC (where Vd is the transmitter driving voltage). Thus, peak interface noise of vn results in a jitter noise of peak amplitude given by:
Equation 15:
Hence, a peak interface noise 20dB below the driving voltage and a time constant of 100ns will result in 10ns…
In the following tests we introduce sinusoidal jitter to the interface timing by connecting a signal generator to the PLL control voltage. (Note that the PLL control voltage governs instantaneous clock frequency, so we must follow the law of Equation 14 in order to accurately predict injected jitter amplitude.) The DAC output is then digitized using a 16-bit ADC with an independent clock, and analyzed for jitter-related artifacts using a PC.
Fig.26a shows the output spectrum from the test DAC using a 0dBFS, 10kHz CD test tone with no jitter introduced into the interface. (The test unit…
In addition, practical low-bit DACs often possess high levels of high-frequency quantization noise that has been shaped away from the audio band, and if very-high-frequency jitter is introduced into such a conversion process, intermodulation products can fall back down into the audio band, causing further degradation of dynamic range and noise modulation (footnote 17). (Our simulations employ a sampling rate of 44.1kHz, and thus can not model such secondary jitter artifacts.)
Analogy to Phase-Intermodulation distortion in Audio Amplifiers: Amplitude errors caused by timing jitter at the…
We now progress to an examination of simulated DAC errors due to band-limited interface jitter. Fig.36a shows the jitter-error spectrum for a 100% DAC reproducing a 0dBFS, 20kHz audio signal with an interface RC time constant of 40ns; the PLL cutoff frequency is set to infinity so that any jitter on the interface won't be attenuated before reaching the DAC. The error contains discrete frequency components rising from the noisefloor—this is because bandwidth-limited interface jitter can contain components that are well correlated with the audio signal (see "Interface Noise").
Fig…
When I was first getting interested in "high fidelity," as we called it back in the 1960s, there was an audio dealer in Worthing, England called Bowers & Wilkins. Their advertisement in the February 1966 issue of Hi-Fi News features their annual sale, with a Quad Electrostatic Speaker priced at £30 instead of the manufacturer's recommended £37 (footnote 1), and offering other bargains, from ReVox, Quad, Rogers, Leak, and Armstrong. Conspicuous by their absence from the ad are Bowers & Wilkins speakers. The first reference to those I could find was in the August 1968 issue of what was…
I had two first impressions of the 705. The first was that its sound, while not mellow, was very smooth. The second was that while it didn't seem to lack sensitivity, it did appear to need quite a lot of drive for the music to come to life. But come to life it certainly did, the sweep of the orchestral sound on our September 2002 "Recording of the Month," Joshua Bell performing the Beethoven and Mendelssohn violin concertos (Sony Classical SK 89505), being reproduced in a most generous manner. Despite that, the image of the solo violin was well-focused and stable, without any tendency to…
Sidebar 1: Specifications
Description: Two-way, reflex-loaded, stand-mounted loudspeaker. Drive-units: 1" (25mm) aluminum-alloy dome tweeter, 6.5" (165mm) woven-Kevlar cone woofer. Crossover frequency: 3.7kHz. Frequency response: 46Hz-25kHz, ±3dB; -6dB at 43Hz & 50kHz. Sensitivity: 89dB/2.83V/m. Nominal impedance: 8 ohms (4.6 ohms minimum). Harmonic distortion (second & third harmonic at 90dB, 1m): ±1%, 90Hz-20kHz; ±0.5%, 150Hz-18kHz. Power handling: 50-120W, unclipped.
Dimensions: 16.5" (420mm) H by 8.75" (222mm) W by 11.4" (290mm) D. Cabinet volume: 16 liters. Weight: 21 lbs…