Krell Reference 64 digital processor Page 2
This technique can theoretically eliminate transport- and interface-induced jitter in the processor's clockprovided the separately transmitted clock is jitter-free. Of course, any jitter in the separate clock, or jitter-inducing mechanisms between the clock source and the DAC (the transmission path, ICs, pcb traces, etc.), will produce jitter at the DAC's word clock. Note that the transport sends the clock signal to the processor on a separate linethe transport is still the master and the processor the slave. (In Linn's Karik/Numerik CD player, the processor generates a master clock which is sent back to the transport, forcing the transport to lock to the processor.) To use the Reference 64's Time Sync function, you must drive it with a Krell transport; no standards exist for defining the separate clock line between processors and transports.
Analog output is provided on a pair of RCA jacks (unbalanced) and XLR jacks (balanced). An IEC AC jack finishes off the rear panel.
The power supply is massive, using three very large custom-made toroidal transformers, five bridge rectifiers, and 11 regulation stages. The analog, digital, and DAC supplies are sourced from separate transformers. All power-supply voltages are doubly regulated (one regulation stage feeding another regulation stage). The regulation stages are unusual in that they use a TO-220type regulator (the ubiquitous three-pin devices) only to set the voltage, with a pass transistor (in a TO-3 package) supplying the current. This arrangement is repeated in both stages of the cascaded regulation. The large TO-3 pass-transistors are mounted to the heatsinking side panels. The TO-3 package is the large metal can most often used in power transistors. They're more expensive and generate more heat than TO-220s, but can handle much more current and are far more robust. The cascaded regulation is used on the digital +5V supply, the analog output stage rails, and the DAC module supplies. Power-supply filtering is provided by three 4700µF and six 1000µF electrolytic caps.
All these power-supply circuits are housed in the Reference 64's lower chassis, isolated from the digital processor circuitry located in the upper chassis. The lower chassis runs very hottoo hot to leave your hand against for more than a few seconds. In fact, the Reference 64's power supply runs hotter than the big Krell KSA-300S power amplifier!
The input receivera large, potted module made from machined aluminumlooks custom-designed. It contains only a Crystal CS8412 input receiver chip and a custom programmable device (PAL). The potting reportedly allows the CS8412 to operate in a more stable thermal environment. Krell says this technique improves the processor's sound.
DSP Filters & DACs
The Reference 64's processor section is quite a piece of engineering. At its heart is the elaborate 64x-oversampling digital filter, which consumes nearly half the processor's real estate. The Reference 64's digital filter sectiona single chip in most processorsruns on four Motorola DSP56001 Digital Signal Processing (DSP) chips with lots of support ICs. The filter takes in 16-bit audio data at 44.1kHz and outputs low-pass filtered 18-bit data (24-bit is the internal word length) at 2.8224MHz, or 64x the input sampling frequency. This makes the Reference 64's filter the highest-oversampling digital filter extant (footnote 1). For comparison, the popular NPC filter chips convert 16-bit audio data at 44.1kHz to low-pass filtered 20-bit data at 352.8kHz (8fs).
The DSP chips are arranged in left- and right-channel pairs. The first DSP brings the signal up to 4x-oversampling, and the second DSP is two 4x-oversampling filters cascaded. Although the second DSP seems to do a disproportionate amount of the work, the second- and third-stage filters require fewer taps and thus less processing horsepower. Erasable Programmable Read-Only Memory (EPROM) chips contain the filtering instructions for the DSP chips.
The filter's output2.8 million 18-bit audio samples every second per channelis written to a FIFO (first-in, first-out) buffer that acts as an interface between the filter and the D/A converter section. The audio samples are then clocked out of the buffer to the DAC. The timing supplied to the filter, FIFO, and DAC is critical.
The DAC chips and associated circuitry are housed in machined-aluminum modules and mounted to the two pcbs by push-on connectors. The DAC modules can be removed by loosening two bolts and pulling up on the housing. A small machined-aluminum cover is bolted to the DAC housing, covering a slot that provides access to the DAC's MSB trimmers. The aluminum housing reportedly provides a more stable thermal environment for the DAC.
The DAC itself is the Burr-Brown PCM64, a device I haven't seen in any other digital processor. Although the PCM64 is an 18-bit device that needs MSB trimming (compared to the PCM63, which is a 20-bit part and needs no trimming), it was chosen because it could handle the very fast operating speeds generated by the 64x-oversampling digital filter. Unlike DACs that allow the Most Significant Bit (MSB) to be internally trimmed at the factory for best linearity, the PCM64 has the provision for adjusting the four MSBs. In the Reference 64, four trim pots inside the aluminum housing are adjusted by hand before the unit leaves the factory. A fifth trim pot sets the gain, which is matched between channels.
Footnote 1: The 64x-oversampling Wadia processor runs at 16x-oversampling in the digital domain, then uses four time-staggered DACs in parallel to get to a 64x rate.Robert Harley